The first customers for TSMC’s state-of-the-art 3nm chip manufacturing process are known. Apple signs up, but that is not surprising, since the manufacturer is at home with TSMC for its chip production. The other customer is more surprising: TSMC competitor Intel will also use the 3 nm process to build its own chips. The move fits in with Intel’s new strategy that CEO Pat Gelsinger announced earlier this year.
Mass production of 3nm chips is planned for 2023. It is unclear whether Intel will use TSMC’s manufacturing capabilities for the production of Core and Xeon chips, or other components such as Xe GPUs or FPGAs.
In any case, the collaboration is historic. After all, TSMC and Intel are competitors and Intel is not in the habit of collaborating with other parties for its chip production. The chip giant from Santa Clara is the only company in the world that develops its own computer chips and builds them in factories. Design and production are usually separated.
Traditionally, Intel was the market leader in semiconductor manufacturing with the most modern factories in the world under his rule. However, the transition from 14 nm to 10 nm was a complete disaster: Intel couldn’t get the production process on track and lost years, so TSMC took over the leadership position. That change of the yellow jersey was accompanied by the return of Intel competitor AMD, which, without its own factories, knocks on TSMC for its chip production anyway. AMD was able to put advanced chips on the shelves as a result, and Intel has felt that. AMD’s market share in the chip market increased from 11 percent in 2019 to 20 percent in 2020.
The collaboration with TSMC should give Intel breathing room. At the same time, Gelsinger wants to put its own factories back at the forefront of technological development. In this way, the chip farmer hopes to stop AMD’s technological lead once and for all.
TSMC, for its part, finds many candidates for the 3 nm process. It is written in the stars that AMD also wants to build CPUs at 3 nm. With the 3 nm process, the components of chips become so small that there are a lot of physics challenges associated with them. For example, TSMC must use EUV technology to ‘draw’ the parts of the chips: a form of invisible light that has such a limited wavelength that even the most reflective mirrors in the world absorb large parts.